- 2017 Fourth Place, ACM ISPD Clock-Aware FPGA Placement Contest (with Chen)
- 2016 Fourth Place, ACM ISPD Routability-Driven FPGA Placement Contest (with Wu et al.)
- 2014 First Prize, ACM Cadathlon (with Wang and Hu)
- 2014 Second Prize, ACM/IEEE ICCAD CAD Contest “Synopsys Platform Development” (with Huang et al.)
- 2014 Second Prize, ACM/IEEE ICCAD and MOE CAD Contest on Incremental Timing Driven Placement (with W.-C. Wu et al.)
- 2014 First Prize, ACM ISPD Detailed Routing-Driven Placement Contest (with S. Liu et al.)
- 2012 Second Prize, ACM Cadathlon (with Chin and Wang)
- 2008 and 2009 NCTU Excellent Teaching Awards
- 2007 MOE SoC Consortium Outstanding Service Award
VLSI/SoC Design Automation Lab
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